Title: AI, Innovation and Global Transformation: Interdisciplinary Perspectives on Technology, Business and Society
Editors: Dr. J. Preetha, and Dr. Siddhartha Mehrotra
ISBN: 978-81-69857-64-2
Chapter: 25
DOI: https://doi.org/10.59646/809/25
Author: Dr. K. Muthulakshmi
Abstract
High-performance artificial intelligence (AI) computing workloads, driven by multi-billion parameter foundation models and real-time tensor reasoning, have outpaced classical silicon scaling boundaries. As classic 2D planar Dennard scaling and traditional FinFET scaling reach thermodynamic and quantum tunneling limits, sub-2nm architectures demand advanced post-silicon paradigms. This chapter evaluates next-generation semiconductor innovations, focusing on Gate-All-Around (GAA) nanosheets, complementary field-effect transistors (CFET), monolithic 3D (M3D) heterogeneous integration, and non-volatile Compute-in-Memory (CiM) crossbars (RRAM/FeFET). Using a multi-scale cross-layer evaluation framework combining atomistic non-equilibrium Green’s function (NEGF) quantum transport, calibrated SPICE parasitic modeling, and cycle-accurate systolic/in-memory neural acceleration profiling, we benchmark these emerging technologies against advanced 3nm FinFET/GAA baselines. The empirical results reveal that vertically stacked CFETs coupled with M3D-RRAM crossbars achieve a reduction in Energy-Delay-Area Product (EDAP), a
increase in energy efficiency (
), and suppress memory-wall stall penalties down to
across transformer inference workloads.
Keywords: Gate-All-Around FET, Complementary FET, Compute-in-Memory, Monolithic 3D Integration, Resistive RAM, Energy-Delay-Area Product.